The present invention relates to a decoder included in a digital communication system for decoding a digitized signal to produce a CMI (Coded Mark Inversion) coded signal and, more particularly, to a decoder for extracting an optimum sampling timing from a CMI coded input signal so as to transform the input signal into a NRZ (Non-Return to Zero) format.
Generally, a signal digitized by coding is subjected to coding of a kind which matches with the characteristics of a particular transmission path before being sent out to the transmission path. Various kinds of coding schemes have heretofore been proposed for such a purpose and include bi-phase coding, typical of which is CMI coding. The principle of CMI coding is such that NRZ codes of "1, 1" and "0, 0" (indicated by using one half of a time slot T for signal transmission as a unit) are alternatively assigned to "1" of an input binary signal, or original data signal, while one of NRZ codes of "0, 1" and "1, 0" each having a phase transition point at the center of a time slot for signal transmission is assigned to "0" of the input binary signal. A prior art CMI decoder adapted to decode such CMI codes is constituted by a first flip-flop circuit to which an input signal is applied, a low pass filter to which an output of the first flip-flop circuit is coupled, a voltage controlled oscillator (VCO) to which an output of the low pass filter is fed, first to third delay lines to which an output of the VCO is applied, and the first flip-flop circuit and a second and a third flip-flop circuit to which outputs of the first to third delay lines respectively are delivered. A drawback with this kind of decoder is that the delay lines have to be adjusted one by one at the instant when clock signals whose phases are individually deviated by +T/4 and -T/4 from the phase of a clock signal extracted from an input signal, resulting in poor operability. Another drawback is that the decoder is not feasible for an integrated circuit configuration because each of the delay lines is implemented with an analog circuit.